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سجل التغييرات الكاملالمحرّك 1.26.4

Op-Amp Noise & DC Error

Analog & Interfacing

How many of your ADC's bits does this op-amp stage leave?

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المدخلات

ملف اللوحة

Fills Ambient temperature from your board profile.

The sensor or filter resistance driving the stage.
Ω
1 kΩ
Inverting: Rs adds in series with it.
Ω
1 kΩ
Ω
9 kΩ
Datasheet maximum at 25 °C.
V
100 µV
Datasheet maximum.
µV/°C
Datasheet maximum over your temperature range.
A
10 nA
Datasheet, flat region (often given at 1 kHz or 10 kHz).
nV/√Hz
1.57 × fc for one pole (MT-048): the filter after the stage, or the stage's own GBW/NG. Below about 10 kHz, set the 1/f corner too.
Hz
15.7 kHz
V
The DC error and the drift are each judged against it.
LSB
Temperature
The span the offset drifts over.
°C
°C
Bias and noise details
Datasheet maximum. Blank takes it as equal to Ib.
A
Datasheet. 1 fA/√Hz is 0.001 pA/√Hz.
pA/√Hz
Where the 1/f slope of the datasheet en curve meets its flat level; 0 for a zero-drift part.
Hz

النتائج

DC error at the output Vdc

1.355 LSB
1.355mV
ناجح

المعيار: Vdc ≤ your 2 LSB budget (2 mV), failing past 2 × (design margin): 0.677 × here, over ΔT 25 °C with Ios taken as Ib
أظهر خطوات الحساب
  1. Noise gainNG = 1 + R_f / R₁ = 1 + 9 kΩ / 1 kΩ = 10
  2. Input noise densitye_ni = √(e_n² + i_n² × (R₊² + R₋²) + 4kT × (R₊ + R₋)) = √((5 nV/√Hz)² + (0.5 pA/√Hz)² × ((1 kΩ)² + (900 Ω)²) + 4k × 298.15 K × 1.9 kΩ) = 7.532 nV/√Hz
  3. Output noise, peak-to-peakv_pp = 6.6 × NG × e_ni × √BW = 6.6 × 10 × 7.532 nV/√Hz × √(15.7 kHz) = 62.29 µV = 0.0623 LSB
  4. Bias error at the inputV_bias = |I_b| × |R₊ − R₋| + (I_os / 2) × (R₊ + R₋) = 10 nA × |1 kΩ − 900 Ω| + (10 nA / 2) × (1 kΩ + 900 Ω) = 10.5 µV
  5. DC error at the outputV_dc = NG × (V_os + TCV_os × ΔT + V_bias) = 10 × (100 µV + 1 µV/°C × 25 °C + 10.5 µV) = 1.355 mV = 1.355 LSB
Output noise, peak-to-peak vpp

0.06229 LSB
62.29µV
Noise-free bits Nfree

16.0 before the cap at the ADC's 12 bits
12
Offset drift over 25 °C Vdrift

0.25 LSB
250µV
كل النتائج (8)
Output noise, rms vrms
9.438µV
Input noise density eni
7.532nV/√Hz
Largest noise source
Offset term at the output NG·Vos

1 LSB
1mV
Bias term at the output NG·Vbias

0.105 LSB, with Ios taken as Ib
105µV
DC error (RSS) Vdc,rss

1.036 LSB
1.036mV
Noise gain NG
10
Noise bandwidth for 1 LSB p-p BW1
4.046MHz
Noise sources, referred to the input
SourceResistanceDensityShare of the noise power
en
in × Rs
in × (R₁ ∥ Rf)
Thermal noise of Rs
Thermal noise of R₁ ∥ Rf

إلى أي حد نعرف هذا الرقم

من أين تأتي الطريقة
  • Analog Devices MT-047
  • Analog Devices MT-048

Analog Devices MT-047, Op Amp Noise المعادلة

Analog Devices MT-048, Op Amp Noise Relationships: 1/f Noise, RMS Noise, and Equivalent Noise Bandwidth المعادلة

مدى دقتها
Exact arithmetic on your datasheet maxima.

The DC terms add with their signs aligned, so the DC error is a worst-case bound for the values entered, not a typical value. The noise counts the white region only, and the bias current usually sets most of the DC error when the input resistances are large.

عملياً يهيمن على عدم اليقين مدخل واحد: Bias current Ib. ضيّقه يضِق معه الجواب.

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Circuit

المبدأ

An op-amp stage in front of an ADC adds two kinds of error. Noise is random: the op-amp's own voltage and current noise and the thermal noise of the resistors, all taken up by the noise gain. DC error is fixed: the offset voltage, its drift with temperature and the bias currents in the resistors. This page gives each in volts and in LSB of your ADC, and the noise-free bits the stage leaves.

Noise gain
NG=1+RfR1′NG = 1 + \frac{R_f}{R_1'}
Non-inverting: R₁′ = R₁. Inverting: R₁′ = R₁ + Rs, since the source drives R₁. Buffer: NG = 1.
Input noise
eni2=en2+in2(R+2+R−2)+4kT(R++R−)e_{ni}^{2} = e_n^{2} + i_n^{2}\left(R_{+}^{2} + R_{-}^{2}\right) + 4kT\left(R_{+} + R_{-}\right)
The sources add in power (ADI MT-047). R₊ and R₋ are the resistances the + and − inputs see with the source shorted: non-inverting R₊ = Rs, R₋ = R₁ ∥ Rf; inverting R₊ = Rp, R₋ = R₁′ ∥ Rf; buffer R₊ = Rs, R₋ = 0. Taken up by NG, the 4kT·R₋ term is exactly the output noise power density of R₁′ and Rf together, 4kT·Rf·NG.
Output noise
vpp=6.6 NG eniBWvrms=NG eniBWv_{pp} = 6.6\, NG\, e_{ni} \sqrt{BW} \qquad v_{rms} = NG\, e_{ni} \sqrt{BW}
Gaussian noise stays within ±3.3 × its rms, a span of 6.6 × rms peak-to-peak, all but 0.1 % of the time, and one RC pole at fc has a noise bandwidth of 1.57 × fc (ADI MT-048). White noise only.
Noise-free bits
Nfree=min⁡(N,  log⁡2VFSvpp)VLSB=VFS2NN_{free} = \min\left(N,\; \log_2 \frac{V_{FS}}{v_{pp}}\right) \qquad V_{LSB} = \frac{V_{FS}}{2^{N}}
Capped at N: an ADC resolves no more bits than it has. Defined on this page.
Bias error
Vbias=∣Ib∣ ∣R+−R−∣+Ios2(R++R−)V_{bias} = |I_b|\,|R_{+} - R_{-}| + \frac{I_{os}}{2}\left(R_{+} + R_{-}\right)
Ib is the mean of the two input currents and Ios their difference, as datasheets define them, so this is the worst case for either sign. A blank Ios is taken as Ib.
DC error
Vdc=NG(Vos+TCVos ΔT+Vbias)V_{dc} = NG\left(V_{os} + TCV_{os}\,\Delta T + V_{bias}\right)
The three terms added with their signs aligned, the worst case. Their root sum of squares is a detail value. The drift alone is NG·TCVos·ΔT.
  • NGNGnoise gain: the gain the input noise and the offsets see
  • R1′R_1'R₁, plus the source resistance Rs in the inverting stage
  • en, ine_n,\,i_nop-amp voltage and current noise densities, flat region
  • R+, R−R_{+},\,R_{-}resistance at the + and − inputs
  • k, Tk,\,TBoltzmann constant, 1.380649 × 10−23 J/K, and the absolute temperature
  • BWBWnoise bandwidth
  • VFS, NV_{FS},\,NADC full scale and resolution
  • Ib, IosI_b,\,I_{os}bias current and offset current
  • Vos, TCVosV_{os},\,TCV_{os}offset voltage and its drift
  • ΔT\Delta Ttemperature change the offset drifts over
  • VoutV_{out}output of the stage, where every error is given
تفاصيل إضافية

Noise and DC error, apart

A calibration can remove a fixed error, but not noise. So the page reports them apart: the DC error and the drift against your error budget, and the noise against the LSB, where up to 1 LSB p-p passes and past 4 LSB fails (design margins). The DC terms add at their worst signs; their root sum of squares, a common statistical estimate, is shown beside them.

1/f noise

Below its 1/f corner fce, an op-amp's voltage noise rises. This page counts the white region only. ADI MT-048 adds fce·ln(fH/fL) to the noise bandwidth for the 1/f region: with fce at BW/100, fL = 0.1 Hz and a 15.7 kHz bandwidth, that adds up to 12 % to the noise power. So from fce = BW/100 up, the answer is marked Unverified. For a zero-drift part, enter 0.

Bias current

Each input's bias current flows in the resistance that input sees. With R₊ = R₋ the Ib part cancels and Ios·R₊ is left, which is why the inverting stage has Rp. Rp adds noise of its own, which this page counts; a capacitor across it removes that noise. On bias-compensated and CMOS parts Ios is of the order of Ib, so matching gains little there.

Use the datasheet maxima over your temperature range, not the typical values.

Not modelled: CMRR, PSRR, resistor tolerance and excess noise, the gain error, and the 1/f region of in. Ib rises with temperature, on a FET input roughly doubling every 10 °C, so enter it at your hottest. With no filter after the stage, its own bandwidth, about GBW/NG, sets the noise bandwidth.

References: Analog Devices MT-047, Op Amp Noise: the sum of the noise sources. Analog Devices MT-048, Op Amp Noise Relationships: 1/f Noise, RMS Noise, and Equivalent Noise Bandwidth: the 6.6 × peak-to-peak factor, the 1.57 × fc noise bandwidth and the 1/f integral. The op-amp's own datasheet for IB, IOS, VOS, en and in. Related: Op-Amp Gain & Bandwidth, ADC Resolution & Noise Budget.

إصدار المحرك ⁨1.26.4⁩